UBS London Technology Conference, presentation dated March 8, 2012

UBS Technology Conference 2012

London

Franki D’Hoore, Director Investor Relations

March 8, 2012

Exhibit 99.2

/ Slide 2

Safe Harbor

"Safe Harbor" Statement under the US Private Securities Litigation Reform Act of 1995:

the matters discussed in this document may include forward-looking statements,

including statements made about our outlook, realization of systems backlog, IC unit

demand, financial results, average selling price, gross margin and expenses, dividend

policy and intention to repurchase shares.

These forward looking statements are subject to risks and uncertainties including, but

not limited to: economic conditions, product demand and semiconductor equipment

industry capacity, worldwide demand and manufacturing capacity utilization for

semiconductors (the principal product of our customer base), including the impact of

general economic conditions on consumer confidence and demand for our customers’

products, competitive products and pricing, the impact of manufacturing efficiencies

and capacity constraints, the continuing success of technology advances and the

related pace of new product development and customer acceptance of new products,

our ability to enforce patents and protect intellectual property

rights, the risk of

intellectual property litigation, availability of raw materials and critical manufacturing

equipment, trade environment, changes in exchange rates, available cash, distributable

reserves for dividend payments and share repurchases, and other risks indicated in the

risk factors included in ASML’s Annual Report on Form 20-F and other filings with the

US Securities and Exchange Commission.

/ Slide 3

Agenda

•

Business summary

•

Outlook

•

ASML technology strategy

/ Slide 4

Business summary

/ Slide 5

Total net sales M€

3,582

3,768

Numbers

have

been

rounded

for

readers’

convenience.

2,954

1,596

4,508

5,651

629

949

919

183

742

1,452

942

930

844

277

1,069

1,529

958

934

697

555

1,176

1,459

1,053

955

494

581

1,521

1,211

1,000

2,000

3,000

4,000

5,000

6,000

2006

2007

2008

2009

2010

2011

/ Slide 6

Key financial trends 2010 –

2011

Consolidated statements of operations M€

Q4 10

Q1 11

Q2 11

Q3 11

Q4 11

Net Sales

1,521

1,452

1,529

1,459

1,211

Gross profit

Gross margin %

685

45.0%

649

44.7%

690

45.1%

613

42.1%

496

41.0%

R&D costs

141

145

150

SG&A costs

Income from operations

Operating income %

494

32.4%

450

31.0%

494

32.3%

407

27.9%

290

23.9%

Net income

Net income as a % of net sales

407

26.7%

395

27.2%

432

28.3%

355

24.4%

285

23.5%

Units sold

ASP new systems

22.4

22.5

22.7

27.1

27.4

Net bookings value

2,315

845

840

514

710

Numbers

have

been

rounded

for

readers’

convenience.

/ Slide 7

Backlog in value per Dec 31, 2011

Total value M€

1,733

Region

(ship to location)

Numbers

have

been

rounded

for

readers’

convenience.

Technology

ArF immersion 64%

KrF 29%

I-Line 2%

ArF dry 5%

End-use

DRAM 11%

IDM 23%

Foundry 50%

NAND 16%

•

75% of backlog carry shipment dates in the next 6 months

USA 28%

Taiwan 14%

Europe 8%

Japan 8%

Singapore 7%

China 5%

Korea 30%

New

systems

Used

systems

Total

systems

Units

Value M€

1,703

1,733

ASP M€

27.9

3.0

24.4

/ Slide 8

Cash return to shareholders

•

ASML

proposes

increase

dividend

15%

€

0.46

per

ordinary share

•

ASML increases the existing 1 billion share buyback program to

€

1,130 million enabling maximum use of available withholding

tax-exempt allowance in 2012

•

In 2012 ASML also intends to purchase up to 2.2 million shares

for the purpose of covering outstanding employee stock and

option plans. These shares will be held as treasury shares

/ Slide 9

•

Repurchased more than 143 million shares since 2006

representing approx. 30% of outstanding shares

Cumulative Cash Return 2006-2011

2006

1000

1500

2000

2500

3000

3500

2007

2008

2009

2010

2011

500

Dividend

Share buy

back

ASML has returned nearly €

3.3 billion cash in

the past 6 years

/ Slide 10

Outlook Q1 2011

/ Slide 11

Q1 Outlook

•

Net sales around €

1.2 billion

•

Bookings expected above Q4 2011 level (was €

710 million)

•

Gross margin about 43%

•

R&D costs at €

145 million

•

SG&A costs at €

54 million

ASML expects H1 2012 net sales of about €

2.4 billion

/ Slide 12

ASML technology strategy

/ Slide 13

Dual product development strategy continues

Evolving high productivity NXT

platform optimized for multi

pass patterning processes

Preparing EUV platform for

volume manufacturing of

critical layers

Concurrent development programs to enhance imaging, overlay,

productivity and process control on both platforms

/ Slide 14

Q4 immersion platform highlights

•

Recognized 101 immersion tools

in 2011 of which 78 were

TWINSCAN NXT:1950i, our most

advanced production systems

•

Overlay accuracy of NXT:1950i

improved by 30% on product

wafers

•

Multiple NXT:1950i systems

printed more than 4000 wafers in

a single day in customer’s fab

/ Slide 15

EUV has arrived worldwide in Fabs

System 5:

Exposing wafers for

device development

System 2

Exposing wafers for

device development

System 4:

Exposing wafers for

device development

System 3:

Exposing wafers for

device development

System 1

Exposing wafers for

device development

System 6:

Exposing wafers for

system qualification

Slide 16 |

Customer roadmaps indicate shrinks to <10nm node

BICS SONOS)

Bit Line

Source

BICS SONOS)

Bit Line

Source

STI

ONO or

High-k

STI

ONO or

High-k

Source: ASML & IMEC

2011 -

2012

2013 -

2014

2015 -

2016

2017 -

2018

22 -

20nm

Memory: 0.08um2, SRAM

Device: planar or FinFET

16 -

14nm

Memory: 0.05um2 SRAM

Device: FinFET, FDSOI

11 -

10nm

Memory: 0.03um2 SRAM

Device: FinFET

8 -

7nm

Memory: FBRAM, STT-RAM,

>8TSRAM

Device:

Nanowire, TFET

38 -

32nm

Memory: stacked MIM

Array: 6F2, bWL

27 -

22nm

Memory: stacked MIM

Array: 6F2, bWL

Node: 22 -

16nm

Memory: stacked MIM

Array: 4F2, bBL, LBL,

1T1C(VFET)

Node: 16 -

14nm

Memory: FBRAM, STT-RAM,

RRAM

Array: 4F2, 1T, 1T1R,

1T1MTJ(VFET)

24 -

19nm hp

4.5F -

6F2 asymm. cell

Density: 64-128G

Device: FG

16 -

14nm hp

6F2 asymmetric cell

4F2 symmetric cell

Density: 256-512G

Device: dual-FG

13 -

11nm hp

7F2 asymmetric cell

4F2 symmetric cell

Density: 512-1024G

Device:: dual-FG,

Intro to

BiCS,

< 10nm hp

Density: > 1T with 3D

chip stacking

Device: 3D BiCS,

XPoint-RRAM

Slide 17 |

ASML roadmaps support shrink to <10nm with ArF immersion and EUV

EUV insertion will vary by sector

Source: ASML & IMEC, 2011

2011 -

2012

2013 -

2014

2015 -

2016

2017 -

2018

22 -

20nm

16 -

14nm

11 -

10nm

8 -

7nm

38 -

32nm

27 -

22nm

22 -

16nm

16 -

14nm

24 -

19nm hp

16 -

14nm hp

13 -

11nm hp

< 10nm hp

ArFi:

SE, DE, LELE, SPT

EUV

ArFi:

SE, SPT

EUV

ArFi:

SE, LELE

SE, SPT, 3xLE

SE, 4xLE, SPT, dbl.SPT

dbl.SPT

dbl.SPT + Trim

EUV

/ Slide 18

EUV introduction by customers will be gradual

•

The low 2x nm technology nodes might introduce EUV

for critical layers

•

Timeline 2013 -

2014

•

The mid 1x nm technology nodes will introduce EUV for

critical layers

•

Timeline 2015 and beyond

•

Immersion will continue to be used for critical layer

imaging in double patterning mode or for mid-critical

layers in single patterning mode

Slide 19 |

ASML Immersion Product Roadmap

NXT:1950i provides performance extendibility until EUV adoption

TWINSCAN NXT Extendibility

Upgradeability

* OPO 5nm Matched,

4nm Dedicated Chuck

2011

Extensions 2012

Extensions 2013+

Matched Machine Overlay

5.5nm

4.5nm

3.5nm

On Product Overlay

9nm

6nm

4nm *

CDU

3nm

1.5nm

1nm

Total focus control budget

110nm

90nm

70nm

Throughput (96 shots)

190 WPH

230 WPH

250 WPH

Defects (ASML test)

10 defects/Wafer

<7 defects/Wafer

Slide 20 |

Shrink drives more exposures and greater litho

system requirements

45k wafers/month

32/28nm Logic

All scenarios are based on “typical”

process using 2012 system

productivity levels . Customers process and wafer start

requirements will vary.

22/20nm Logic

ArFi

KrF

I-Line

KrF

ArFi

KrF

ArFi

KrF

ArFi

KrF

ArFi

I-Line

ArF

ArFi

37 litho layers (14

Critical

–

nonCritical)

38 litho exposures (13 SE, 1 LELE, 23 nonCritical)

KrF

I-Line

KrF

ArFi

KrF

ArFi

KrF

ArFi

KrF

ArFi

KrF

I-Line

ArF

ArFi

40 litho layers (19

Critical

–

nonCritical)

52 litho exposures (8 SE, 10 LELE, 1LELELE, 21 nonCritical)

8% layer increase

37% exposure increase

Slide 21 |

EUV simplifies process (and reduces cost)

Double

Spacer

Single

Spacer

EUV

CVD

Coat

Expose

Develop

Metrology

Defect inspection

Etch

Strip/clean

Litho Etch

Data is based on Customer interaction

LELE relative to EUV

Process steps x2

Cycle time

Additional costs < 10%

DPT relative to EUV

Process steps x4

Cycle time

Additional costs 30-50%

QPT relative to EUV

Process steps > x5

Cycle time

> x5

Additional costs > 50%

Slide 22 |

NXE technology roadmap has great extendibility

first illumination optimization, then NA increase

wavelength [nm]

coherence

0.25

0.33

DPT with 0.33NA at 13.5 nm

0.45

0.60

0.45-0.60

=0.5

=0.8

=0.2-0.9

Flex-OAI

Extended Flex-OAI

reduced pupil fill ratio

site / in integration

In system definition

Under study

Resolution [nm]

TIME

13.5

6.8

Slide 23 |

NXE:3100 imaging performance proven for

various customer applications

16nm dense lines

Flash staggered contact layer

Bitline pitch = 44 nm (1:1.2)

CH pitch = 74.4 nm

30 nm Brickwall DRAM

Sub 16 nm node

SRAM Contact Hole

0.038µm2 bit cell-size,

hp 30/32 nm

Sub 16 nm node

SRAM metal-1

0.038µm2 bit cell-size,

hp 30/32 nm

27 nm Gate Layer

Flash

Source: ASML

Slide 24 |

The NXE:3100 has exposed more than 5,300 wafers

…and is enabling device development at customer sites

Slide 25 |

Existing EUV offices &

manufacturing, 8 cabins.

New EUV offices &

manufacturing,15 cabins.

Building for volume production: new cleanroom

cabins available

New EUV factory at ASML for ~3x capacity increase

Two cabins finished (Jan.12)

Slide 26 |

Summary and conclusions: EUV….here to stay

Imaging and Overlay performance of NXE: 3100 platform is

good, and supports current customer device and process

development for 2xnm node

NXE:3300B scheduled to ship to customers later this year

EUV delivers:

Single exposure shrink, fewer design restrictions, less fab

complexity, less fab space

and is extendable for many nodes to come

ASML has made industrialization commitment of throughput

and system stability