CERTAIN INFORMATION IN THIS EXHIBIT HAS BEEN OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION.

THE `[**]` SYMBOL INDICATES THAT INFORMATION IN THIS EXHIBIT HAS BEEN OMITTED AND FILED SEPARATELY WITH THE COMMISSION PURSUANT TO RULE 24B-2 AND THAT CONFIDENTIAL TREATMENT HAS BEEN REQUESTED WITH RESPECT TO SUCH OMITTED PORTIONS.

____ 1 ____ 

DEVELOPMENT AND SUPPLY AGREEMENT

FOR DISK ON KEY CBIC ASIC

This Development and Supply Agreement (this "Agreement") is made and entered into as of April 18, 2001 (the "Effective Date") by and between Atmel Rousset, with offices located Zone Industrielle 13106, Rousset Cedex ,France   and  Atmel Sarl, a Swiss corporation with offices at Route des Arsenaux 41, Case Postale 80, CH-1705 Fribourg, Switzerland (hereafter collectively referred to as "Atmel"), and M-Systems, an Israeli corporation with principal offices located at Central Park 2000, 7 Atir Yeda St., Kfar  Saba 44425, Israel ("Company").

RECITALS

WHEREAS, Atmel Rousset is in the business of designing, developing, and manufacturing  various types of integrated circuits;

WHEREAS, Atmel Sarl is in the business of supplying such integrated circuits;

WHEREAS, Company is in the business of developing and marketing electronic disks for data storage based on flash memory for markets such as embedded systems, telecommunications, and Internet appliances; and

WHEREAS, Atmel and Company desire to enter into this Agreement for the purpose of setting forth the terms and conditions under which Atmel will design, develop and manufacture the semiconductor device described herein.

AGREEMENT

IN CONSIDERATION THEREOF AND THE MUTUAL PROMISES CONTAINED HEREIN, THE PARTIES HERETO AGREE AS FOLLOWS:

1. Statement of Work

a. The specification of the Product shall  be concluded between Company  and Atmel as described in  Exhibit A.

b. Atmel shall layout, develop, manufacture, test and supply, the Products described in Exhibit A. Atmel shall provide all technology, labor, material, tooling and facilities necessary for performing such services.  

____ 2 ____ 

c. Company shall provide ongoing consultation throughout the design and development process.

d. The parties shall mutually agree to a joint development flow to be attached as Exhibit F hereto.

2. Non-Recurring Engineering  

Company shall pay Atmel non-recurring engineering ("NRE") charges for all services rendered hereunder as set forth in Exhibit B attached hereto.   These charges shall be billed and shall be payable within thirty (30) days of the date of invoice.

3. Exclusivity

The Products shall be sold to Company on an exclusive basis.  Atmel shall have no right to manufacture for its own use or  to offer or sell Products to any third party without the written consent of Company.

4. Product Pricing and Delivery

a. Company shall pay Atmel for the Products as set forth in Exhibit B attached hereto.

b. All shipments covered by these terms and conditions are F.C.A Atmel`s facility (Free Carrier - Incoterms 2000).  Atmel`s liability for delivery shall cease upon Atmel delivering the products to the common carrier at Atmel`s facility.  Title and all risk of loss or damage to the products shall pass to Company upon delivery to the common carrier at Atmel`s facility.

c. Unless otherwise agreed to by the parties, the prices stated herein do not include customs duties or any sales, use, excise, or other similar taxes.  Company shall pay, in addition to the prices stated, the amount of any present or future customs duties or any sales, use, excise or other similar tax applicable  to the sale of products or performance of services covered by these terms, or in lieu thereof, Company shall supply Atmel with an appropriate tax exemption certificate.

5. Product Forecasting and Production Lead Time and Cancellations

a.  Company shall provide Atmel with a  twelve (12)  month non- binding rolling forecast.

b.  Company shall be financially responsible for all Products covered by purchase orders within the product lead times as defined in Exhibit C.

____ 3 ____ 

c.  On time delivery is defined as not more than three (3) days early, or five (5) days late.

d.   Reschedules or cancellations are detailed in Exhibit C.  

6. Risk orders

If Company decides to release orders requiring fabrication or assembly of devices prior to prototype acceptance such orders will be deemed to be a Risk Order.  The prices for Risk Orders will be detailed in Exhibit B.  Company has the right to cancel Risk Orders per a liability schedule also detailed in Exhibit B.

7. Upsides

Atmel can respond to upsides as defined in Exhibit C.

8. End of Life

a.  In the event that Atmel decides to discontinue the Product Atmel will provide Company with a written notification six (6) months in advance for last time buy orders to be placed by Company.  Company will have the right to receive delivery for such orders for an additional six (6) months.

b.  In no event will Atmel end of life the Product (process AT57K/ 0.25um)  before December 31, 2003. Should Company require Product after December 31, 2003, Atmel will offer favorable conditions to provide the Product on a new process  technology provided that production volumes exceed 400,000 units per year.

9. Purchase Orders

a. All purchase orders for Products shall be made by written purchase order.  The purchase order shall specify the item number, product description, quantity, requested delivery dates and delivery instructions.

b. Seller shall acknowledge the order within five (5) business days.

c. The minimum order quantity is one hundred thousand dollars ($100,000.00) and the minimum delivery quantity is twenty thousand dollars ($20,000.00).

____ 4 ____ 

10.  Development Milestones

a. Atmel shall use all reasonable efforts to meet the schedule for each phase or milestone of the design and development as set forth in Exhibit B attached hereto.

b.  In the event that Atmel is unable to supply Prototypes which meet the agreed upon specification, Company shall not be liable for the payment due to Atmel hereunder for such milestone.

11.  Changes

a. Company may, at any time during each design, propose changes to the Specifications set forth in the circuit design and layout, or any other functional or performance specifications agreed to between Atmel and Company.  Such proposal shall be submitted by Company to Atmel in writing.  

b.  Atmel will then estimate in good faith the amount of rework necessary and the additional  development time and cost that would be incurred, and shall request Company`s approval of such additional cost and development time.  Upon written receipt of such approval, implementation of such changes will proceed.  

c.  The Agreement will be amended to reflect such changes and the schedules will be amended to reflect the new dates and additional payments (if any) resulting from such changes.

12. Quality

a. Atmel agress to comply with ISO9000 quality standards for the duration of the agreement.  Each shipment will contain a Certificate of Compliance.

b. As required by ISO9002, Atmel agrees to keep on file all records and data concerning acceptance and quality control testing.

c. Reasonable quality assurance parameters such as AQL (Acceptance Quality Levels) and reliability test reports will be provided as requested by Company

d. Company maintains a Supplier Rating System and shall grade Atmel based upon on time delivery and quality levels.

____ 5 ____ 

e. The Company and Atmel hereby agree to the Quality and Reliability Requirements for M-System ASICs referenced in Exhibit D attached hereto.

13. Protection and Security of Design

a. "Confidential Information" shall mean that information of either party which is disclosed to the other party ("Receiving Party") by reason of the parties` relationship hereunder, either directly or indirectly in any written or recorded form, orally, or by drawings or inspection of parts or equipment, and, either in writing and marked as confidential or proprietary, or if oral, reduced to writing similarly marked within thirty (30) days of disclosure.

b. Receiving Party covenants and agrees that it will receive and use the Confidential Information only as expressly permitted in this Agreement, and will not otherwise employ such Confidential Information, and shall not disclose such Confidential Information to any person or persons who do not need to have knowledge of such Confidential Information in the course of their employment.

3. It is expressly understood that Receiving Party shall not be liable for disclosure of any Confidential Information if the same:

i.	is or becomes part of the public domain without violation of this Agreement;
ii.	is known and on record at the Receiving Party prior to disclosure by the Disclosing Party;
iii.	is lawfully obtained by the Receiving Party from a third party;
iv.	is furnished to others by the Disclosing Party without similar restrictions to those herein contained as to use or disclosure thereof;
v.	is developed by the Receiving Party completely independently of any such disclosure by the Disclosing Party;
vi.	is ascertainable from a commercially available product; or
vii.	is disclosed pursuant to the order or requirement of a government body, court or  administration agency.

14. Warranty

a.  Atmel warrants that it has title to all material to be furnished to Company and that all prototypes delivered to Company hereunder will conform to the logic diagram, specifications and (if any) breadboard herein set forth, or which are otherwise agreed upon between the parties.

____ 6 ____ 

b.  Any Product or service sold or provided pursuant to this Agreement, shall be deemed accepted by Company upon delivery, subject to the warranty provisions set forth in this Section. Atmel warrants that Product delivered hereunder shall comply with the Specifications and shall be free from defects in material and workmanship under normal use and service for a period of one (1) year from the applicable date of invoice.  Products which are "samples", "design verification units", and/or "prototypes" are sold "AS IS," "WITH ALL FAULTS," and with no warranty whatsoever.

c. If, during such warranty period, (I) Atmel is notified promptly in writing upon discovery of any defect in the Product, including a detailed description of such defect; (ii) such goods are returned to Atmel, DDP Atmel`s facility accompanied by Atmel`s Returned Material Authorization form; and (iii) Atmel`s examination of such goods discloses that such Products are defective and such defects are not caused by accident, abuse, misuse, neglect, alteration, improper installation, repair, improper testing, or use contrary to any instructions issued by Atmel, Atmel shall (at Company`s option) either repair, replace, or credit Company the purchase price of such goods.  No Products may be returned to Atmel without Atmel`s Returned Material Authorization form.

d.   Prior to any return of Products by Company pursuant to this Section, Company shall afford Atmel the opportunity to inspect such Products at Company`s location, and any such goods so inspected shall not be returned to Atmel without its prior written consent.

e  Atmel shall return any Products repaired or replaced under this warranty to Company transportation prepaid, and reimburse Company for the transportation charges paid by Company for such goods.  The performance of this warranty does not extend the warranty period for any Products beyond that period applicable to the Products originally delivered.

f. THE FOREGOING WARRANTY CONSTITUTES ATMEL`S EXCLUSIVE LIABILITY, AND THE EXCLUSIVE REMEDY OF COMPANY, FOR ANY BREACH OF ANY WARRANTY OR OTHER NONCONFORMITY OF THE PRODUCTS COVERED BY THIS AGREEMENT.  THIS WARRANTY IS EXCLUSIVE, AND IN LIEU OF ALL OTHER WARRANTIES. ATMEL MAKES NO OTHER WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING WITHOUT LIMITATION ANY WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.  THE SOLE AND EXCLUSIVE REMEDY FOR ANY BREACH OF THIS WARRANTY SHALL BE AS EXPRESSLY PROVIDED IN THIS SECTION.

____ 7 ____ 

15.  Intellectual Property Ownership

1. Atmel shall retain all patent, copyright, trade secrets and other intellectual property rights it possesses with regard to any gate array or other integrated circuit design or process. The design, development or production of the product hereunder shall not be deemed to be a work made for hire.

2. Any derivative works specifically paid for by Company shall be owned exclusively by Company as referenced in Exhibit E.  The masks and design database files developed specifically for Company under this Agreement shall be owned by Company, but shall remain in the possession of Atmel.  Both the mask sets and design database files shall remain at Atmel`s facility and will be destroyed upon Company`s request.  All patents, copyrights or other intellectual property rights related solely to the technical information and specifications generated by Company shall remain the sole and exclusive property of Company.

c.  Each party`s proprietary information may, if required by the parties, be further defined and protected by separate Confidential Disclosure Agreement to be executed by the parties, and each party`s sole and exclusive obligations with regard to such proprietary information shall be as set forth in such Confidential Disclosure Agreement.

d.  Except as set forth or on the front of this Agreement, any circuits, cells, devices or processes that are developed by Atmel concurrently with the work performed under this agreement shall be the sole and exclusive property of Atmel, and Atmel reserves the right to use such cells for other circuits for other customers, or license the use thereof to others.

16.  Design Termination

a.      If the design is terminated by Company, Company shall be liable to Atmel for full payment for the milestone during which such termination occurs, regardless of the amount of work actually performed by Atmel for such milestone.  In any event, Company shall be liable for payment not already made by Company for any previous milestone.

____ 8 ____ 

b.      During performance of the design or development, either party may terminate the design in the event of material breach by the other party (except for non-payment which does not require notice) upon thirty (30) days prior written notice specifying such breach to the breaching party.  If during such thirty (30) day period the breaching party cures such breach (or, if the cure cannot be effected within such thirty (30) day period, the breaching party commences to cure), no such termination shall occur.  If terminated by Atmel for breach, Company shall be liable to Atmel for the full payment of the development milestone during which such termination occurs, regardless of the amount of work actually performed by Atmel for such milestone.  If terminated by Company for Atmel`s breach, Company shall not be liable for any services performed by Atmel under such Agreement.  The provisions of this Section constitute the sole liability and responsibility of each party, and the sole and exclusive remedy of each party, in the event of a breach of this Agreement by the other party during the design and development.

17.  Force Majeure

Atmel shall not be liable for any failure to deliver, or delay in the delivery of, any Products or services due to any cause beyond its control, including but not limited to acts of God, acts of civil or military authority, fires, epidemics, floods, riots, wars, sabotage, or labor disputes.  In the event of any such delay, the date of delivery or performance hereunder shall be extended by a reasonable period of time.  

18.   Limitation of Liability

IN NO EVENT SHALL EITHER PARTY BE LIABLE FOR ANY SPECIAL, INCIDENTAL, CONSEQUENTIAL OR INDIRECT DAMAGES RESULTING FROM ITS PERFORMANCE OR FAILURE TO PERFORM UNDER THIS AGREEMENT, WHETHER BASED UPON CONTRACT, NEGLIGENCE, STRICT LIABILITY IN TORT, WARRANTY OR ANY OTHER BASIS WHATSOEVER (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS).

NOTWITHSTANDING ANY PROVISION HEREIN TO THE CONTRARY, ATMEL SHALL NOT UNDER ANY CIRCUMSTANCES BE LIABLE FOR EXCESS COSTS OF REPROCUREMENT.  

____ 9 ____ 

19.   General

1. Neither party may assign its rights or obligations under this Agreement without the prior written consent of the other, and any purposed assignment without such consent shall have no force or effect.  Subject to the foregoing, this Agreement shall bind and inure to the benefit of the respective parties hereto and their successors and assigns.

2. Neither party is authorized to act for or on the behalf of the other party under this Agreement.  Without limiting the generality of the foregoing, each party is an independent contractor, and no principal/agent or partnership relationship is created between them by this Agreement.

3. No failure or delay by either party to enforce or take advantage of any provision or right under this Agreement shall constitute a subsequent waiver of that provision or right, nor shall it be deemed to be a waiver of any of the other terms and conditions of this Agreement.

4. Upon termination of this Agreement the provisions of Sections 3, 12, 13, 14, 15, 18, and 19 shall survive termination.

5. Each of the parties hereto agree that they will comply with all applicable export regulations.

6. The validity, performance and construction of this Agreement shall be governed by the laws of the State of California, USA (excluding its conflict of laws provisions).  Santa Clara County, California shall be the appropriate venue and jurisdiction for the resolution of disputes hereunder.  Customer hereby expressly consents to (I) personal jurisdiction of the state and federal courts of Santa Clara County, California and (ii) service of process being effected upon it by certified or registered mail sent to its principle address.

7. The prevailing party in any legal action arising out of, or related to this Agreement shall be entitled, in addition to any other rights and remedies it may have, to reimbursement for its expenses incurred in such action, including court costs and reasonable attorney`s fees.

8. Unless otherwise stated herein, amounts stated as payable under this Agreement do not include customs duties or sales, use, excise or other similar taxes payable hereunder, and the same shall be the responsibility of Company.

____ 10 ____ 

9. All notices or communications to be given under this Agreement shall be in writing and shall be deemed delivered upon hand delivery, upon acknowledged telex or facsimile communication, or three (3) days after deposit in the United States mail, postage prepaid by certified registered or first class mail, addressed to the parties at their principle address.

10. In the event that any provision of this Agreement is prohibited by any law governing its construction, performance or enforcement, such provision shall be ineffective to the extent of such prohibition without invalidating thereby any of the remaining provisions of the Agreement.  The captions of sections herein are intended for convenience only, and the same shall not be interpretive of the content of such section.

11. The terms and conditions of this Agreement may not be superseded, modified, or amended except in writing which states that it is such a modification, and is signed by an authorized representative of each party hereto.

l.   This Agreement, including exhibits, constitutes the entire Agreement between the parties as to the subject matter hereof, and supersedes and replaces all prior or contemporaneous agreements, written or oral, regarding such subject matter, and shall take precedence over any additional or conflicting terms which may be contained in either party`s purchase orders or order acknowledgment forms.

Atmel Rousset	Company
By:                   /s/ Mike Ross	By:                  /s/ Dov Moran
Title:            Mike Ross, Director	Title:             President
Atmel Sarl
By:        /s/ Graham Turner
Graham Turner
Vice President and General Manager

____ 11 ____ 

Exhibit A

See Attached M-Systems Project Diskonkey dated 4/05/2001

Atmel Rousset	Company
By:                   /s/ Mike Ross	By:                  /s/ Dov Moran
Title:            Mike Ross, Director	Title:             President
Atmel Sarl
By:        /s/ Graham Turner
Graham Turner
Vice President and General Manager

____ 12 ____ 

Exhibit B

See Attached M-Systems Project Diskonkey dated 4/05/2001

Atmel Rousset	Company
By:                   /s/ Mike Ross	By:                  /s/ Dov Moran
Title:            Mike Ross, Director	Title:             President
Atmel Sarl
By:        /s/ Graham Turner
Graham Turner
Vice President and General Manager

____ 13 ____ 

M-SYSTEMS PROJECT:  DISKONKEY

- ATMEL 04/05/2001 -

(OFFER 2001 014 FBO)

Option 7 & 8

[**]

CONTENTS

EXHIBIT A

1	CONFIGURATIONS..............................................................................................	2
2	TECHNICAL EVALUATION...................................................................................	4
3	SPECIFIC DESIGNS - OPTIONS.......................................................................	5

EXHIBIT B

4	DESIGN FLOW & SCHEDULE...........................................................................	6
5	SPECIFICATION REFERENCES........................................................................	9
6	COMMERCIAL PROPOSAL................................................................................	10

____ 14 ____ 

EXHIBIT A

1 - CONFIGURATIONS

ATMEL can support the below configurations extracted from M-Systems requirements:

●        ARM7TDMI core is supported as hard macro (Gate to layout level - RTL compatible).

●        All below peripheral blocks are supported as soft macros (Gate level - RTL compatible).

●        USB controller spec 1.1 is supported as soft macro.  USB pads are available.

●        Power On Reset 2.5V macro is available.

●        All below RAM/ROM blocks are available as memory compiled blocks.

NOTE:

ARM7TDMI core and peripheral blocks are not available in RTL format for customer (only Gate level format under license agreement).

Specific designs and options are considered in the chapter III:  Specific designs - Options.

	Option 7 [**]	Option 8 [**]
ARM / ASB	1 ARM7TDMI 1 ARM7TDMI wrapper 1 Decoder + Arbiter 1 EBI + 4 external CS	1 ARM7TDMI 1 ARM7TDMI wrapper 1 Decoder + Arbiter 1 EBI + 4 external CS
ARM / APB	1 Bridge ASB/AHB 1 PDC 4 channels1 1 USART2 (7816-3 classB) 1 USB 1.1 (Device) - 4EP 1 AIC (1 + 9 IT)2 1 Watchdog 1 PMC (Power Management Ctrl) 1 Timers 32 GPIO2	1 Bridge ASB/AHB 1 PDC 4 channels 1 USART2 (7816-3 classB) 1 USB 1.1 (Device) - 4EP 1 AIC (2 + 7 IT) 1 Watchdog 1 PMC (Power Management Ctrl) 1 Timers 32 GPIO2
RAM	[**]	[**]
ROM	[**]	[**]
Analog	2 PLL (48 MHz -60 MHz) 1 POR25 1 Oscillator (6-12MHz)	2 PLL (48 MHz -60 MHz) 1 POR25 1 Oscillator (6-12MHz)
User Design Logic	[**]	[**]
IO5	~80 IO USB buffers (D+, D-) I/O 5V-Tol buffers I/O/IO full 3.3V buffers Hi-Z (Tri-state pads)	~80 IO USB buffers (D+, D-) I/O 5V-Tol buffers I/O/IO full 3.3V buffers Hi-Z (Tri-state pads)
Package constraints	TQFP100/80 LQFP100/80 LFBGA100 Die only	TQFP100/80 LQFP100/80 LFBGA100 Die only

____ 15 ____ 

	Option 7 [**]	Option 8 [**]
Design flow	Turn Key / Joint development Evaluation board	Turn Key / Joint development Evaluation board

NOTE 1- 2 channels for USB and 2 channels for USART1.

2- 1 external interruptions, 1 for USB, 1 for USART1, 3 for timers, 1 for watchdog, 1 for PMC and 2 for customer module.

3- These modules are designed by M-Systems.

4- Wrapper for FIFO (USB), wrapper for EBI/APB interface for M-Systems core.

5- No full 5V buffer is available in the targeted technology (0.25um).

____ 16 ____ 

2 - TECHNICAL EVALUATION

	Option 7 [**]	Option 8 [**]
Technology	ATC25 (AT57K) Cell-based 0.25µm Core supply : 2.5V IO supply : 2.5V / 3.3V 5V Tolerant	ATC25 (AT57K) Cell-based 0.25µm Core supply : 2.5V IO supply : 2.5V / 3.3V 5V Tolerant
Basic Package	LQFP 100 (Plastic) [**] (ceramic version available)	LQFP 100 (Plastic) [**] (ceramic version available)
Optional Packages	LQFP80 10x10 mm2 x 1.4mm TQFP80 10x10 mm2 x 1.0mm TQFP80 12x12 mm2 x 1.0mm TQFP100 12x12 mm2 x 1.0mm LFBGA 100 10x10 mm2 x 1.4mm Die Only	LQFP80 10x10 mm2 x 1.4mm TQFP80 10x10 mm2 x 1.0mm TQFP80 12x12 mm2 x 1.0mm TQFP100 12x12 mm2 x 1.0mm LFBGA 100 10x10 mm2 x 1.4mm Die Only
Total die size	[**] Core limited	[**] Core limited
Power cons. Estimation	Stdby : <300µA Op. : <70 mA	Stdby : <300µA Op. : <70 mA

____ 17 ____ 

3 - SPECIFIC DESIGNS - OPTIONS

3.1 SPECIFIC DESIGNS

REGULATOR CELLS 3.3v - 2.5 v

Specific development has to be done. This cell is not yet qualified. 2 regulator cells could be necessary (1 for PLLs, 1 for the digital core). PLL cells have to be adapted (external supply pads have to be replaced by internal connection). Specific regulator has to be done to adapt the current delivery to PLLs current. Regulator Development leadtime:  8 weeks (PLL modification and specific regulator development are included) No impact on the final die size value, as it is a peripheral macro and thanks to the core limited situation. This regulator can be implemented inside the ASIC but we recommend placing this function of the ASIC, thanks to an external 5V-3.3V-2.5V regulator.

RANDOM GENERATOR CELL

Added information is needed to complete the current customer requirement Random Development leadtime:  To Be Defined Impact on the die size:  To Be Defined

ARM/AMBA peripheral soft macros:

Modification on the ARM/AMBA peripheral soft macros can be done by ATMEL, on customer request (after technical approval).

Cost and leadtime will be defined from specifications.

3.2 OTHER OPTIONS

●       Chip ID - 64 bits: not available yet, in 0.25 um.

Boundary Scan IEEE1149.1:

Development leadtime: 2 weeks

NOTE:  In case of standard Boundary scan, this should not impact the total die size (~5KG), except if complex Boundary scan functions are required.

●       Bonding option:

JTAG pins bonding can be removed for mass production.

____ 18 ____ 

EXHIBIT B
ASIC NON-RECURRING ENGINEERING AND DEVELOPMENT MILESTONES

4- DESIGN FLOW & SCHEDULE

____ 19 ____ 

4.1 TURN KEY:

Design development:

Start:  specifications are fixed (agreement from M-SYSTEMS/ATMEL).

End:  mask release.

●                    Very best case:  16 weeks
(maximum effort on post-layout validation - 2 instead of 4 weeks)

●                    Best case:  18 weeks
(simulations done in 2 weeks - other validations done in parallel)

●                    Worst case:  24 weeks

Boundary scan option:  +2 weeks

Samples production in ceramic package:  (only valid for LQFP/CQFP100 14x14)

●                    Leadtime:  [**] weeks

Samples production in plastic package:  (LFBGA100 / TQFP80-100 / LQFP80)

●                    leadtime:  [**] weeks

Cores deliverables:

Core type	FPGA Models3	ASIC Models
ARM	ARM7TDMI Test chip	Verilog netlist1 (after synthesis)
Peripheral cells	FPGA Netlist1 (After FPGA synthesis2)
USB core	specific USB board
USB transceiver	specific USB board
Analog cells	N/A

NOTE 1- Under license agreement.
2- Done by ATMEL.
3- Development board & FPGA netlist compilation will be defined (cost, leadtime) on customer`s request.

____ 20 ____ 

4.2 JOINT DEVELOPMENT:

Basically, the development flow is the same as the Turn Key one, but:

●                    M-SYSTEMS and ATMEL are co-responsible of the top RTL integration and synthesis.

●                    M-SYSTEMS is responsible of validation, before and after Place & Route (STA and timing simulations).

●                    ATMEL provides support for these tasks.

ATMEL design development:

Start: RTL netlist is done and validated by behavioral simulations.  

End:   mask release.  

●                    Very best case:  12 weeks
(maximum effort on post-layout validation - 2 instead of 4 weeks)

●                    Best case:  14 weeks
(simulations done in 2 weeks - other validations done in parallel)

●                    Worst case:  20 weeks

Total design development:

To get the total development time, add time needed for M-SYSTEMS to integrate the top RTL, to validate netlist before P&R and after P&R by simulation.

Boundary scan option: + 2 weeks

Samples production in ceramic package:  (only valid for LQFP/CQFP100 14X14)

●                    Leadtime:  [**] weeks

Samples production in plastic package:  (LFBGA100 / TQFP80-100 / LQFP80)

●                    Leadtime:  [**] weeks

Cores deliverables:  (ARM/AMBA +USB sub-system)

____ 21 ____ 

Core type	FPGA Models1	ASIC Models
ARM	ARM7TDMI Test chip	Verilog/C models timing file (SDF) test vectors
Peripheral cells	FPGA Netlist1 (After FPGA synthesis2)	Verilog Netlist (after synthesis) test production by scan
USB core	specific USB board	Verilog Netlist (after synthesis) test production by scan
USB tranceiver	specific USB board	Verilog Models
Analog cells	N/A	Verilog Models test vectors

NOTE 1- Under license agreement.
2- Done by ATMEL.
3- Development board & FPGA netlist compilation will be defined (cost, leadtime) on customer`s request.

____ 22 ____ 

5- SPECIFICATION REFERENCES

5.1 ARM7TDMI 32-BIT MICRO-CONTROLLER CORE AND PERIPHERALS

5.1.1 AVAILABLE DOCUMENTS

Reference Number	Document name
0673B	ARM7TDMI Embedded Core Datasheet
1734A	Peripheral Data Controller 2 (PDC2)
1725A	Parallel Input/Output 2 (PIO2)
1246D	Advanced Interrupt Controller (AIC)
1241A	Watchdog Timer (WD)
1243A	Timer Counter (TC)
1751A	PMC (Power Management Controller)

5.1.2 DOCUMENTS UNDER PREPARATION

Reference Number	Document name
1733B[1]	USART2 (ISO7816-3)
	(current reference 1733A + USART3 as update)
N/A	EBI controller - SMC controller
N/A	ASB Decoder

5.2 USB CONTROLLER AND PADS

Reference Number	Document name
Version 1.8	USB MacroCell Version 1.8 E1
N/A	USBlib databook (PU33B11F - Full speed 3V USB bidirectional pad)

5.3 ANALOG CELLS

Reference Number	Document name
Rev 2.2, April 12, 2000	POR25 (Power On Reset)
Rev 2.1, April 2000	PLL (5-250 MHz Single Pad Phase Locked Loop)

¹  1733B is not still available, 1733A specification is removed.

____ 23 ____ 

6- COMMERCIAL

Configuration		Option 7 A [**]	Option 8 A [**]
Technology		ATC25 (AT57K) Cell-based 0.25µm	ATC25 (AT57K) Cell-based 0.25µm
Package		LQFP 100 (Plastic) 14x14mm2 x 1.4mm	KQFP 100 (Plastic) 14x14mm2 x 1.4mm
Total die size		[**]	[**]
Unit Price	100 ku/y	[**]	[**]
	500 ku/y	[**]	[**]
	1 Mu/y	[**]	[**]
	2 Mu/y	[**]	[**]
NRE	Turnkey Design	[**]	[**]
	Joint development	[**]	[**]
Boundary Scan Insertion		[**]	[**]
Regulator development adder		[**]	[**]
Random Generator development adder		[**]	[**]

Package options	LQFP80 10x10 mm2 x 1.4mm	TQFP80 12x12mm2 x 1.0mm	TQFP80 10x10mm2 x 1.0mm	TQFP100 12x12mm2 x 1.0mm	LFBGA 100 10x10mm2 x 1.4mm	Die Only
Unit Price Adder (Vrs LQFP100 option)
From 0 to 500Ku:	[**]	[**]	[**]	[**]	[**]	[**]
Above 500 Ku:	[**]	[**]	[**]	[**]	[**]	[**]
NRE Adder (Vrs LQFP100 option)	[**]	[**]	[**]	[**]	[**]	[**]

Manufacturing production leadtime is [**] weeks.

____ 24 ____ 

6.1 Yearly production price fixing:

1. M-Sys shall provide on monthly basis it 12 months non-binding rolling forecast.

2. M-Sys shall release purchase orders based on Atmel`s lead time.

3. The prices on the orders will be based on the best estimations of the realization of the forecast.

4. Both parties will check after 12 months period of the first delivery of the production batch the total qty M-Systems actually purchased.

5. In the event that the qty M-Systems actually purchased is in the limits of +/- 20% of the basic stepped the prices were agreed, then those prices are applied.  In the event that the prices are below or above the said limits then the next or back step shall be applied.  The sides will credit or debit each others accordingly.

The following sets forth the [**] payable by Company for the term of this Agreement for the products specified in Exhibit A.  All prices will be reviewed every three (3) months to assess if cost reductions can be made.  If cost reduction is feasible, then the new prices will apply accordingly to all Purchase Orders, which are not started production.

NRE COST INCLUDES:

- Technical support, dedicated technical interface and formation.

- Project management.

- Synthesis, scan insertion, Place&Route, Test interface.

- Top RTL integration, simulations (For turnkey option only)

- Prototypes manufacturing.

- Prototypes testing.

CHIP AREA ESTIMATION:

The chip area is an estimation based on M-SYSTEMS specifications, and detailed in chapter 1 Configuration.  Production prices will remain valid for any variation of the size in the range of +/-10% based on the M-Systems specifications (detailed in Chapter 1, Configuration).

____ 25 ____ 

PAYMENT TERMS:

For NRE: 33% Upon Receipt of Purchase order
33% Final design Review
34% at Prototypes Delivery.

Last payment of 34% will be made 30 days after receipt of the prototypes by M-Systems, provided that the prototypes shall comply with the RTL signoff of the agreed specification as defined in Exhibit A.

For production:  by standby letter of credit.

Risk Orders

If Company decides to release orders requiring fabrication or assembly of devices prior to acceptance of prototypes such orders will be deemed Risk Orders.

Risk order have to be placed before the signoff.

Company has the right to cancel Risk Orders upon the following schedule:

1. If the product has not started through the wafer fab by the time Atmel receives Company`s written notice:  no charge.

2. If the product are in wafer fab, the cancellation charge will be 75% of the finished product price.

3. If the product are in assembly or final test the cancellation charge shall be 100% of the price of the product.

This offer is valid two months and is governed by the Development and Supply Agreement.

____ 26 ____ 

EXHIBIT C

FORECASTING - ORDERING - DELIVERIES

This Exhibit describes the supply system established between ATMEL and M-SYSTEMS for volume production.
The purpose is to offer to M-Systems operating flexibility enabling to reach the common goal of high volume production.

M-SYSTEMS and ATMEL consider a reliable forecasting system as a key element for a good matching between M-SYSTEMS deliveries needs and ATMEL customer satisfaction orientation.  The more accurate the forecasts are, better results will be achieved by both parties.

●        ATMEL shall reserve production capacity based on M-SYSTEMS forecast for deliveries schedule.  Before the 7th of each month M-SYSTEMS has to provide ATMEL with a 12 month-deliveries-rolling-forecast (12MRF).  Within a week ATMEL shall give M-SYSTEMS an answer on the feasibility of the 12MRF.  In the event M-SYSTEMS does not update the forecast by the 7th, the last forecast receive remain valid on time.

●           Within each month, M-SYSTEMS can place a P.O. for any quantities according to the last agreed 12MRF.
Maximum monthly quantities ATMEL is committed to supply are those fixed in the considered 12MRF, within a leadtime of [**] weeks from M-SYSTEMS P.O. reception by ATMEL.

●           For the first PO of the 12 MRF the delivery lead time could be more than [**] weeks depending upon the preload at ATMEL (except if Atmel gets before the project sign-off a production PO) at the date of the M-SYSTEMS P.O.  Same situation will apply if a monthly 12 MRF was not agreed or if there is an important deviation between effective PO`s and the agreed forcast.

●           Special situations of shorter delivery time, greater quantities, will be considered case by case when they happen.

To reduce the lead time to [**] weeks, [**] can be maintained at the following conditions;
- Implementation of running PO`s reasonably matching the 6 MRF.
- M-Systems PO running [**] priced at [**] of finished product.  The stock will be rotated on a FIFO basis.  Availability and replenishment lead time for the stock is 10 weeks from PO.  Pulling time of 4 weeks by call orders from stock availability date.
- If lack of running PO`s will not enable to manage the stock on a FIFO basis, M-Systems will be billed for the resting stock.

____ 27 ____ 

CONDITIONS OF RESCHEDULE AND CANCELLATION

●               Order cancellation is subject to charges as follows:

Order Cancellation Table
Cancellation period in calendar weeks prior to delivery date	Cancellation Charges as percentage of the unit price
0 - 4	100
5 - 6	80
7 - 8	65
9 - 10	45
11 - `X`	25

`X` in the cancellation table is the lead-time at the time of order placement.  The cancellation period is defined as the difference between the calendar week of Atmel`s confirmation date and the calendar week of the cancellation date.

The cancellation date is the date on which Company`s written cancellation request sent to Atmel, by fax or registered letter.

In the event that quantities are not started Production Company can cancel orders with no penalty.

●               Delivery Reschedules.

COMPANY shall have the right to reschedule any portion of a Purchase Order, upon giving a written notification to Atmel at least four (4) weeks, prior to the scheduled delivery with no penalty and without affecting the unit price.  Company shall have the right to reschedule a line of an Order for a Maximum three (3) months period from the original approval scheduled delivery date.

____ 28 ____ 

Exhibit D

Quality and Reliability Requirements for M-Systems ASIC`s

To be mutually agreed to by the parties.

____ 29 ____ 

Exhibit E

Intellectual Property Ownership

Mask sets, design tapes, documentation and data generated pursuant to this Agreement

____ 30 ____ 

Exhibit F

Joint Development Flow

____ 31 ____ 

Exhibit F
Joint Development Flow[1]:

1 DESIGN ELEMENTS

ARM / ASB	1 ARM7TDMI 1 ARM7TDMI wrapper 1 Decoder + Arbiter 1 EBI + 4 external CS
ARM / APB	1 Bridge ASB/APB 1 PDC 4 channels 1 USART2 (7816-3 class B) 1 USB 1.1 (Device) - 4EP 1 AIC (1 + 9 IT) 1 Watchdog 1 PMC (Power Management Ctrl) 1 Timers 32 GPIO2
RAM	[**]
ROM	[**]
Analog	2 PLL (48 MHz -60 MHz) 1 POR25 1 Oscillator (6-12MHz) 2 Regulators 3.3V 2.5V
User Design Logic	[**]M-SYSTEMS modules [**] [**]
IO	~80 IO USB buffers (D+, D-) I/O 5V-Tol buffers I/O/IO full 3.3V buffers Hi-Z (Tri-state pads)
Package constraints	TQFP100/80 LQFP100/80 LFBGA100 Die only

____ 32 ____ 

2 DESIGN FLOW

____ 33 ____ 

3 DESIGN FLOW TASKS

SPECIFICATIONS

●                  ATMEL Standard cells databooks:

1306D ATC25 Databook
(Process, Standard Pads, Standard cells, compiled RAM/ROM)

●                  Customer agreement based on referenced ATMEL datasheets:

0673B	ARM7TDMI Embedded Core Datasheet
1734A	Peripheral Data Controller 2 (PDC2)
1725A	Parallel Input/Output 2 (PI02)
1246D	Advanced Interrupt Controller (AIC)
1241A	Watchdog Timer (WD)
1 243A	Timer Counter (TC)
1733B USART2 (ISO78l6-3)
Rev 2.2, April 12, 2000	POR25 (Power On Reset)
Rev 2.1, April 2000	PLL (5-250 MHz Single Pad Phase Locked Loop)
	Package drawing

●                  USB parameters from customer requirements:

Version 1.8	USB MacroCell Version 1.8 E1
N/A	USElib databook (PU33B11F - Full speed 3V USB bidirectional pad)

●                  Customer modification based on referenced ATMEL datasheets:

N/A EBI controller - SMC controller
To Be Confirmed

●                  Cells adaptation according to the ARM/AMBA system:

1751A	PMC (Power Management Controller)
N/A	ASB Decoder

●                  ATMEL Specific Design based on customer specifications:

____ 34 ____ 

●                   

1 Regulator 3.3V-2.5V for core.

1 Regulator 3.3V-2.5V for PLLs.

PLL adaptation.

●                  ASIC issues - ATMEL/Customer evaluation and approval:

Pinning/package/marking specification.

Power consumption estimation.

Production test: design for SCAN, BIST, PLL test and ARM test.

Design constraints.

Test production vectors.

Evaluation Board.

Simulation vectors.

ROM code.

Design flow / duties / project reviews.

KICK OFF (Meeting:  ATMEL / M-SYSTEMS
Specifications review

____ 35 ____ 

EVALUATION BOARD

M-SYSTEMS would like to use SIDSA CARMEN board.

●                  M-SYSTEMS Deliverables:

M-SYSTEMS modules	RTL or Gate level
	(RTL is safer to implement inside FPGA)

M-SYSTEMS modules should be FPGA compatible:  full synchronous, no delay lines.

●                  ATMEL Deliverables:

ARM/AMBA peripherals and USB C library	C format
to generate drivers to extract system testbenches

Except:
PMC is too complex to be implemented inside FPGA, clocks are active permanently.

●                  Tasks list:

Update ARM/AMBA peripherals and USB C library	[**]
With Booster peripherals C library

FPGA Netlist generation [**]

ARM/AMBA peripherals and USB Drivers adaptation for DoK [**]

FPGA Netlist validation on evaluation board	[**]
Running software from ARM/AMBA peripherals and USB C library

Application software debugging [**]

Extract system testbenches for simulation [**]

NOTE:

To optimize [**], we recommend to keep the same address mapping.

Internal memory will be emulated by external memory.

10 MHz is the expected system frequency for such FPGA implementation.

____ 36 ____ 

Top RTL Integration

●                  ATMEL Deliverables:

ATMEL Tools Kit (for Synthesis, for simulation, for Backend integration - FAST tools-)
ATC25 Standard libraries (Pads, Standard cells, Clock buffer, compiled RAM/ROM, BIST)
ASC : Application Specific Cells - ANALOG CELLS	MODELS and TESTBENCH
POR25 (Power On Reset)
Regulators
PLL (5-250 MHz Single Pad Phase Locked Loop)
Oscillator
ASC : Application Specific Cells - ARM/AMBA sub-system	MODELS
ARM7TDMI core
ARM&TDMI production test vectors (ARM JTAG)
AMBA peripherals blocks	- gate level netlist (under license agreement)
ASC : Application Specific Cells - USB	MODELS
USB pad
USB core	- gate level netlist (under license agreement)

●                  Tasks list:

ATMEL specific Designs (analog cells) [**]

ARM peripherals and USB synthesis	[**]
With system constraints from M-SYSTEMS
Stand alone validation with full testbench for each peripheral

ARM sub-system integration	[**]
With system constraints from M-SYSTEMS
Basic validation on ARM sub-system connections

RTL implementation	[**]
ARM sub-system / M-SYSTEMS modules connections.
Pads implementation.
Clock buffer implementation.
Design for SCAN.
Design for Analog Cells test.
Design for BIST.
ROM code creation.
M-SYSTEMS modules design.

____ 37 ____ 

ARM sub-system - validation on application	[**]
With system testbenches generated from evaluation board (gate level + estimated SDF)

M-SYSTEMS Modules - behavior validation on full system	[**]
M-SYSTEMS modules validation inside the full system (RTL level)

DESIGN REVIEW (Meeting:  ATMEL / M-SYSTEMS

Green light for Synthesis.

____ 38 ____ 

____ 39 ____  Synthesis + Scan + ATPG + Pre-layout simulation

●                  Input files (from M-SYSTEMS):

RTL

Test vectors files

ROM code

Design constraints (documentation)

Clock structure identification (documentation)

SCAN structure identification (documentation)

Analog cells test structure identification (documentation)

BIST structure identification (documentation)

ASIC Pinout (documentation)

●                  Tasks list:

Synthesis [**]

Check design.

Synthesis scripts creation.

Compilation to ATMEL library.

Check violations.

Gate level netlist generation.

Design Rule Check on Gate Level Netlist.

SCAN insertion - ATPG [**]

Structure Analysis.

Check test structure.

Insert SCAN.

ATPG generation.

Boundary SCAN insertion (option).

Gate level netlist generation.

Timing estimation file generation (SDF).

Validation by simulation.

Design Rule Check on Gate Level Netlist.

Static timing Analysis [**]

STA Scripts creation.

Analysis and approval

____ 40 ____ 

Pre-layout Validation	ARM sub-system - functional validation on application [**] With system testbenches generated from evaluation board (gate level + estimated SDF) (should be already done during top RTL integration step) M-SYSTEMS Modules - functional validation on full system [**] M-SYSTEMS modules validation inside the full system (gate level + estimated SDF) Production test vectors validation [**] Production test vectors validation by simulation. (gate level + estimated SDF) Check production test vectors -FAST-
	Place & Route database preparation [**] Pinout issue: Pads placement -FAST- Pads placement checks -FAST-
	Pinning file generation -FAST- Database transfer for P&R -EDK to CDK- Constraints file for P&R:  GCF file generation

DESIGN REVIEW (Meeting:  ATMEL / M-SYSTEMS
Green light for Place and Route.

____ 41 ____ 

Floorplanning / Place & Route / Post-layout validation

●                  Input files (from M-SYSTEMS/ATMEL):

Place & Route Database

●                  Tasks list:

	Floorplanning [**] Should be not needed Place and Route (Timing Driven Layout) [**] Placement. Clock tree routing. Routing. Optimization. DRC/LVS. SDF file extraction.
Post-layout Validation	ARM sub-system - functional validation on application [**] With system testbenches generated from evaluation board (gate level + extracted SDF) M-SYSTEMS Modules - functional validation on full system [**] M-SYSTEMS modules validation inside the full system (gate level +extracted SDF) Production test vectors validation [**] Production test vectors validation by simulation. (gate level +extracted SDF) Check production test vectors -FAST-
	Static Timing Analysis [**] STA Scripts creation. Analysis and approval.

____ 42 ____ 

____ 43 ____ 
Signoff (Mask release)

The below table contains the signoff database files.  They have to be validated by ATMEL and the customer:

Type file	Format	Delivery/generation	Validation by
Gate level Netlist	Verilog, VHDL	Synthesis	STA, Simulation
Post-layout timing file	SDF	Place and Route	STA, Simulation
DRC result file	DRC	Simulation kit (es2drc)	No error, Warnings checked
Design constraints	GCF	CADENCETM translator	STA, Place and Route
Test vectors	SWF	FAST(sim2swf)	Test vectors simulation, FAST(wavechk, testchk)
Waves consistency check	WCK	FAST(wavechk)	No error, Warnings checked
Tester`s requirements check result	VEC, DCT, TIMSET1	FAST(testchk)	No error, Warnings checked
Pinning	ADB	FAST(assyedit)	FAST (iocheck, assychk)
Package drawing	PDF	ATMEL	CUSTOMER agreement
Packaging check result	AYC	FAST (assychk)	No error, Warnings checked
Power supplies rules check result	IOC, PAD VSS, VDD	FAST (iocheck)	No error, Warnings checked
Design specification	Variable (doc)	CUSTOMER	CUSTOMER / ATMEL
Test specification	Variable (doc)	CUSTOMER / ATMEL	CUSTOMER / ATMEL
Power consumption	Variable (doc)	CUSTOMER / ATMEL	CUSTOMER / ATMEL
Marking	Variable (doc)	CUSTOMER	CUSTOMER / ATMEL
Signoff document	DOC	ATMEL	CUSTOMER / ATMEL

SIGNOFF REVIEW (Meeting: ATMEL/M-SYSTEMS)

Green light for Mask production release.

____ 44 ____ 

Samples production and test

●                  Input files (from M-SYSTEMS/ATMEL):

Signoff Database

●                  Tasks List:

Masks production (ATMEL)

Chips Productions (ATMEL)

Packaging (ATMEL)

Production test (ATMEL)

Samples delivery (ATMEL)

Samples Approval

Samples validation in customer application.

____ 45 ____ 

[1] It is understood on both sides that the full design flow and stage duration will be discussed in detail during the kick off meeting.

[2] 1733B is not still available, 1733A specification is removed.

____ 46 ____